//******************************************************************************
//	 MSP430x47xx Demo - USCI_A0, 115200 UART Echo ISR, DCO SMCLK
//
// Description: Echo a received character, RX ISR used. Normal mode is LPM0.
// USCI_A0 RX interrupt triggers TX Echo.
// Baud rate divider with 1048576hz = 1048576/115200 = ~9.1 (009h|01h)
// ACLK = LFXT1 = 32768Hz, MCLK = SMCLK = default DCO = 32 x ACLK = 1048576Hz
// //* An external watch crystal between XIN & XOUT is required for ACLK *//
//
//				 MSP430x47xx
//			 -----------------
//		 /||			 XIN|-
//		 | |				 | 32kHz
//		 --|RST		 XOUT|-
//		 |				 |
//		 |	 P2.4/UCA0TXD|------------>
//		 |				 | 115200 - 8N1
//		 |	 P2.5/UCA0RXD|<------------
//
// P. Thanigai / K.Venkat
// Texas Instruments Inc.
// November 2007
// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version: 3.42A
//******************************************************************************
#include "msp430x47x4.h"
void main(void)
{
volatile unsigned int i;
WDTCTL = WDTPW+WDTHOLD;				 // Stop WDT
FLL_CTL0 |= XCAP14PF;					 // Configure load caps
do
{
IFG1 &= ~OFIFG;						 // Clear OSCFault flag
for (i = 0x47FF; i > 0; i--);			 // Time for flag to set
}
while ((IFG1 & OFIFG));				 // OSCFault flag still set?
P2SEL |= BIT4+BIT5;					 // P2.4,5 = USCI_A0 RXD/TXD
UCA0CTL1 |= UCSSEL_2;					 // SMCLK
UCA0BR0 = 0x09;						 // 1MHz 115200
UCA0BR1 = 0x00;						 // 1MHz 115200
UCA0MCTL = 0x02;						 // Modulation
UCA0CTL1 &= ~UCSWRST;					 // **Initialize USCI state machine**
IE2 |= UCA0RXIE;						 // Enable USCI_A0 RX interrupt
_BIS_SR(LPM0_bits + GIE);				 // Enter LPM0, interrupts enabled
}
// Echo back RXed character, confirm TX buffer is ready first
#pragma vector=USCIAB0RX_VECTOR
__interrupt void USCIA0RX_ISR (void)
{
while(!(IFG2&UCA0TXIFG));
UCA0TXBUF = UCA0RXBUF;				 // TX -> RXed character
}

#include "msp430x47x4.h"
#include "main.h"

extern char Hello_World[] = {"Hello, World!nr"}; //Current RSSI as ASCII.

void main(void)
{

WDTCTL = WDTPW+WDTHOLD; // Stop WDT

// ================[ Crystal Oscillator ]===============
FLL_CTL0 |= XCAP14PF; // Configure load caps

do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0x47FF; i > 0; i--); // Time for flag to set
}
while ((IFG1 & OFIFG)); // OSCFault flag still set?
// =====================================================

// ====================[ UART config ]==================
//UART1:
P4SEL |= BIT0+BIT1;
UCA1CTL1 |= UCSSEL_2;
UCA1BR0 = 0x09;
UCA1BR1 = 0x00;
UCA1MCTL = 0x02;
UCA1CTL1 &= ~UCSWRST;
// UC1IE |= UCA1RXIE;
// =====================================================


CCTL0 = CCIE; // CCR0 interrupt enabled
TimerChacker = 0;
TACCR0 = 62500 - 1;
TACTL = TASSEL_2 + ID_3 + MC_1 + TACLR; // SMCLK, up mode

_BIS_SR(LPM0_bits + GIE); // Enter LPM3

}

// =============== [ Timer actions ] ==================
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
if (++TimerChacker == 3) {
sendToWizFi(Hello_World);
TimerChacker = 0;
}
}
// =====================================================

int getLength(unsigned char mess[]){
int j;
for (j=0; j<MAX_BUFF; j++){
if ((mess[j] == 'r')) break;
}
return j;
}

void sendToUART(unsigned char mess[]){
int maxLen = getLength(mess);
for (int j=0; j<=maxLen; j++){
while(!(UC1IFG&UCA1TXIFG));
UCA1TXBUF = mess[j];
}
}